Low Power Design with High-Level Power Estimation and Power-Aware Synthesis W. Vogel & M. Büttner GmbH und der Schuld
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und der Schuld
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Low Power Design with High-Level Power Estimation and Power-Aware Synthesis W. Vogel & M. Büttner GmbH und der SchuldThis book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC FPGA design.
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